// random_tb

module random_tb();
    
    reg clk,rst_n;
    wire out;
    
    random random_tb(
    .clk(clk),
    .rst_n(rst_n),
    .out(out)    
    );
    
    initial begin
        clk = 0;
        rst_n = 1;
        
        #10 rst_n = 0;
        #20 rst_n = 1;
        
        // #1000 $stop;
    end
    
    always #5 clk = ~clk;
    
endmodule
